Plenary Lecture
A Methodology for Fault Tolerant ASIC Design
Dr. Zoran Stamenkovic
System Design/Wireless Broadband Communication Systems
IHP GmbH, Frankfurt (Oder)
Germany
E-mail: stamenko@ihp-microelectronics.com
Abstract: The sensitivity of application specific integrated circuits (ASICs) to the single event effects (SEE) can induce failures of the systems which are exposed to increased radiation levels in the space and on the ground. A design methodology for a full fault-tolerant ASIC that is immune to the single event upsets (SEU) in sequential logic, the single event transients (SET) in combinatorial logic and the single event latchup (SEL) in CMOS logic will be presented. The dual modular redundancy (DMR) and a SEL power-switch (SPS) are the basis of a modified ASIC design flow that incorporates the fault tolerance. Measurement results that prove the correct functionality of DMR and SPS circuits, as well as a high fault tolerance of implemented ASICs along with moderate overhead in respect of power consumption and occupied silicon area will be analyzed too.
The fault injection models for simulation and validation of the fault tolerance of redundant systems to the SEUs and SETs will be introduced. The fault models are based on the random generated SEUs in sequential logic and SETs in combinatorial logic. The analytical models for calculation of the probability of failure-free triple modular redundant (TMR) and dual modular redundant (DMR) circuits will be defined. To justify the reduced redundancy concept, the simulated and calculated probabilities of failure-free TMR and DMR circuits will be discussed and compared. The results showing trade-off between hardware overhead and circuit failure-free probability of the two concepts will be presented too.
Brief Biography of the Speaker: Dr. Zoran Stamenković is with IHP GmbH, Frankfurt (Oder), Germany. He received his Ph.D. degree in electronic engineering from the University of Niš, Serbia in 1995.
His research interests include wireless SOC design, HDL modelling, logic synthesis, chip layout, and IC yield and reliability modelling and prediction. He has leaded the EU funded project on a wireless MIMO system (MIMAX) at IHP GmbH. Currently he is in charge for the project on a vehicle wireless camera system funded by the German State of Brandenburg.
Dr. Stamenković has published a book on IC yield, six chapters in prestigious monographs, and more than 80 scientific journal and conference papers.