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Abdelghani Dendouga
Slimane Oussalah



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Abdelghani Dendouga
Slimane Oussalah


WSEAS Transactions on Signal Processing


Print ISSN: 1790-5052
E-ISSN: 2224-3488

Volume 13, 2017

Notice: As of 2014 and for the forthcoming years, the publication frequency/periodicity of WSEAS Journals is adapted to the 'continuously updated' model. What this means is that instead of being separated into issues, new papers will be added on a continuous basis, allowing a more regular flow and shorter publication times. The papers will appear in reverse order, therefore the most recent one will be on top.



Comparative Analysis of Two Op-Amp Topologies for a 40MS/s 8-bit Pipelined ADC in 0.18µm CMOS Technology

AUTHORS: Abdelghani Dendouga, Slimane Oussalah

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ABSTRACT: The performances of two full differential operational amplifiers (Op-Amps) telescopic and folded-cascode are evaluated to satisfy the stringent requirements on the amplifier to be used in a Multiplying Digital-to-Analog Converter (MDAC) stage of a pipelined ADC (Analog-to-Digital Converter). The paper shows the solutions found to reach high gain, wide bandwidth and short settling time without degrading too much the output swing. The Op-Amp specifications are extracted according to the ADC requirements, then the two Op-Amp topologies are designed, tested and their performances are compared. Simulation results show that the Op-Amp folded-cascode topology is more suitable architecture for pipelined ADC than the telescopic one. Moreover, the use of this type of Op-Amp generates an Integral Non-Linearity (INL) error less than that of the telescopic one. The analyses and simulation results are obtained using 0.18 µm AMS (Austria Mikro System) CMOS process parameters with a power supply voltage of 1.8V. The predicted performance is verified by analysis and simulations using Cadence EDA simulator.

KEYWORDS: CMOS analog circuit design, Op-Amp, Multiplying Digital-to-Analog Converter, pipelined ADC

REFERENCES:

[1] T.C. Carusone, D.A. Johns, and K.W. Martin, “Analog Integrated Circuit Design”, 2nd ed., John Wiley & Sons, Inc: New York, USA, 1996, pp. 606–623.

[2] R.J. Van de Plassche, “In CMOS Integrated Analog-to-Digital and Digital-to-Analog Converters”, 2nd ed., Springer: New York, USA, 2003, pp. 237–262.

[3] M. Gustavsson, J.J. Wikner, and N.N. Tan, “CMOS Data Converters for Communications”, Kluwer Academic Publishers, Norwell, MA, USA, 2000, pp. 87– 121.

[4] S.W. Sin, U. Seng-Pan, and R.P. Martins, “1.2V, 10-bit, 60-360 MS/s time-interleaved pipelined analog-to-digital converter in 0.18µm CMOS with minimized supply headroom”, IET Circuits Devices & Systems, Vol.4, 2010, pp. 1–3.

[5] S. Barra, S. Kouda, A. Dendouga, and N.E. Bouguechal, “Simulink Behavioral Modeling of a 10-bit Pipelined ADC. International”, Journal of Automation and Computing, Vol.10, 2013, pp. 134–142.

[6] J.F. Lin, S.J. Chang, C.C. Liu, and C.H. Huang, “C.H. A 10-bit 60-MS/s low-power pipelined ADC with split-capacitor CDS technique”, IEEE Transactions on Circuits and Systems, Vol.57, 2010, pp. 163–167.

[7] B. Razavi, “Design of Analog CMOS Integrated Circuits”, 1st ed., Mc-GrawHill: New York, USA, 2001.

[8] H.M. Berlin, “Design of Operational Amplifier Circuits: With Experiments”, Sams, 1st ed.; USA, 1978.

[9] P.R. Gray, P.J. Hurst, S.H. Lewis, and R.G. Meyer, “Analysis and Design of Analog Integrated Circuits”, 5th ed.; Wiley: N.J., USA, 2009.

[10] M. Figueiredo, J. Goes, and G. Evans, “Reference-Free CMOS Pipeline Analog-toDigital Converters”, 1st ed., Springer-Verlag, New York, USA, 2013.

[11] G. Aad, et al. “The ATLAS Experiment at the CERN Large Hadron Collider”, Journal of Instrumentation, Vol. 3, 2008, pp. 1–407.

[12] E. Bilhan, P.C. Estrada-Gutierrez, A.Y. ValeroLopez, and F. Maloberti, “Behavioral model of pipeline ADC by using SIMULINK”, In Proceedings of IEEE Southwest Symposium on Mixed-signal Design, Austin, TX, USA, 25-27 February 2001, pp. 147–151.

[13] J.F. Lin, S.J. Chang, “A high speed pipelined analog-to-digital converter using modified time-shifted correlated double sampling technique”, In proceedings of IEEE International Symposium on Circuits and Systems, Island of Kos, Greece, 21-24 May 2006, pp. 5367–5370.

[14] I.S. Ishak, S.A. Zainol Murad, M.F. Ahmad, and N.S. Chin, “Comparative study of two operational amplifier topologies for Pipelined Analog-to-Digital Converter (ADC)”. International Journal of Automation and Computing, Vol.10, 2013, pp. 134–142.

[15] J. Yu, Z. Mao, “Automated Design Method for Parameters Optimization of CMOS Analog Circuits Based on Adaptive Genetic Algorithm”, In Proceedings of the International Conference on ASIC, Guilin, China, 22–25 October, 2007, pp. 1217–1220.

[16] L. Nolle, M. Köppen, G. Schaefer, and A. Abraham, “Intelligent Computational Optimization in Engineering: Techniques and Applications”, Springer-Verlag: Berlin, Germany, 2011.

[17] J. Tao, X. Chen, and Y. Zhu, “Constraint Multi-objective Automated Synthesis for CMOS Operational Amplifier”, In Life System Modeling and Intelligent Computing, Springer: New York, USA, 2010.

[18] A. Dendouga, S. Oussalah, D. Thienpont, and A. Lounis, “A. Program for the Optimization of an OTA for Front end Electronics Based on Multi-Objective Genetic Algorithms”, In proceedings of the IEEE International Conference on Microelectronics, Belgrade, Serbia, 12–15 May 2014, pp. 443–446.

[19] A. Dendouga, S. Oussalah, D. Thienpont, and A. Lounis, “A. Multi-Objective Genetic Algorithms Program for the Optimization of an OTA for Front-End Electronics”, Advances in Electrical Engineering, Vol.14, 2014, 14, pp. 1–5.

[20] A. Dendouga, S. Oussalah, “Comparative study of two CMOS operational amplifiers for high performance pipelined ADC”, In Proceedings of the IEEE International Conference on Design & Technology of Integrated Systems in Nanoscale Era, Napoly, Italy, 21–23 April 2015, pp. 1-2.

WSEAS Transactions on Signal Processing, ISSN / E-ISSN: 1790-5052 / 2224-3488, Volume 13, 2017, Art. #10, pp. 83-89


Copyright © 2017 Author(s) retain the copyright of this article. This article is published under the terms of the Creative Commons Attribution License 4.0

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